Workshops

Si-EPIC Program organizes a series of four design workshops annually. 

Workshops are open to students and industry.

 

2012

2013

2014

2015

2016

Passive Silicon Photonics

June 25 – July 6

McGill University

 

May 27 – June 2

University of Ottawa

 

May 21 – 27

Laval University

 

May 13 – 19

UBC

 

May 27 - June 2

 

Laval University

Active Silicon Photonics

November 2 – 5

UBC

 

July 8 – 16

McGill University

 

October 24 – 28

UBC

 

August 18 – 24

UBC

August 8 - 12

McMaster University

Electronics for Photonics (CMOS)

 

August 26 – 30

UBC

 

November 7 – 11

UBC

 

August 31 - September 4

Concordia University

 

Systems, Integration, and Packaging

 

 

July 8 – 11

McGill University

 

 

May 2 - 6

McGill University

eBeam Lithography

 

 

October 12

University of Washington

Silicon Photonics Workshop – IEEE Group IV Photonics Conference – August 25

Silicon Photonics Fabrication Workshop on Sub-wavelength Grating Materials / Meta-materials – IEEE Photonics Conference – October 4

 

Masters students begin their degrees with a summer workshop and typically take two workshops during their degree.Undergraduate students undergo a summer research assistant position in one of the co-PI labs (typically focused on experimentation with mentorship from a graduate student), concurrently take a summer workshop, and complete their own design.SiEPIC scholars will receive specialized training via these workshops.  Students are required to attend at least one of four Si-EPIC workshops per year, typically 5-10 days long.

PhD students take all four workshops during their degree (e.g., one per year).

Workshop Description

1. Passives Silicon Photonics: This course provides training in the design, fabrication, and test of photonic integrated circuits (PICs) targeting the imec-ePIXfab SiPhotonics passives technology.   The course begins with a six-day hands-on workshop & seminar where participants: learn how to model and design silicon photonic components and circuits; learn to use the design tools (included as part of the workshop); understand the fabrication technology and design rules; and will conceive their design project.  During the next several months, participants will complete a design and mask layout, with the support from and a design review with the instructors and their peers.  The designs will be fabricated by imec, and participants will receive their own chips for testing.  

Although a library of components is provided for those interested in designing circuits, participants can design their own advanced components such as waveguides, fibre grating couplers, directional couplers, ring resonators, Bragg gratings, optical filters, and so on. Numerous participants have published research papers based on their designs fabricated via this workshop.  This workshop is suitable for first-time silicon photonic designers with a background in optics.  

2. Actives Silicon Photonics: Targeting experienced silicon photonic designers (i.e., those who have previous design and test experience with passive silicon photonics), this workshop provides an opportunity for training in the design and test of active photonic integrated circuits (PICs) which will be fabricated by IME in Singapore on a multi-project wafer run.  This technology enables both active and passive photonic devices to be monolithically integrated on the same chip, including modulators (ring and travelling wave); detectors (germanium); gratings for fibre coupling; deep trenches and nano-tapers for edge coupling; passive components such as optical multiplexers (diffraction or arrayed waveguide) and filters (e.g., ring resonators). This training can be a stand-alone learning opportunity or combined with your research and/or development. Target applications include optical communications and sensors.

Participants will learn about: the fabrication and process design kit (PDK); TCAD device modeling using Lumerical Solutions software suite (detectors, modulators, rings, MZI, PN & PIN junctions, thermal tuning, optical components, microwave design of electrodes); CAD layout and verification using Mentor Graphics; design for testability. Modelling and design software is provided.

3. CMOS Electronics for Photonics: This workshop provides an opportunity for training in the design, fabrication and test of CMOS integrated circuits targeting the IBM 0.13 µm CMOS technology.  Target applications include IC design for optical communications and optical sensors, including designs specifically for the participants’ own photonic chips.  Participants will design CMOS circuits, which will be fabricated and packaged, and delivered.

The first day of the workshop is for first-time CMOS designers, e.g., photonics designers. Topics include a brief overview of transistors, amplifiers and bias circuits; tutorials on CMOS analog circuit design using EDA tools; schematic, simulation, layout, DRC, LVS, parasitic extraction; and a brief overview of common circuit blocks such as op-amps.

The rest of the week is focused on CMOS designs specific for silicon photonics.  We begin with compact models for optical devices such as phase shifter (pin, thermal), ring and travelling wave modulators, and detectors, for which circuits are to be designed.  Tutorials cover optical link budget analysis; receiver design (limiting receiver, linear receiver, trans-impedance amplifiers (TIA), limiting amplifiers (LA), input offset cancellation, AGC techniques); transmitter design (modulator drivers, termination, bias control, laser drivers); tuning circuits; packaging considerations (wire- and bump-bond and package parasitics).  Advanced research topics in CMOS electronics and photonic-electronic systems will be presented.

4. System Integration and Packaging: Packaging is viewed by industry as the single biggest technical hurdle to overcome to enable the successful commercialization of silicon photonic integrated circuits.  This hands-on training provides the knowledge, tools, and opportunity to develop a packaging solution for your silicon photonic design.  As part of the registration fee, participants who already have a chip(s) will be given the opportunity to get their chip packaged via one of the available packaging options, or design their own package.  

The topics covered at the workshop include: the design of co-packaging for electronics and photonics; electronic-photonic circuit co-design; optical interfaces using edge and grating couplers to fibre arrays; design for test; design for packaging; ceramic carrier and printed circuit board design for DC and RF interfaces; microwave modelling; thermal management; integration of silicon photonic chip in package; wire-bonding, flip-chip bonding, and aerosol printing of interconnects.  Modelling and design tools are provided.

5. eBeam Lithography: This short course teaches participants (industry professionals, academics) how to design passive silicon photonic devices using analytic and advanced numerical techniques.  Participant designs will be fabricated by a state-of-the-art rapid-prototyping 100 keV electron-beam lithography facility (University of Washington – Washington Nanofabrication Facility, USA).  All designs will be tested using an automated optical probe station (University of British Columbia, Canada) and the data provided to the participants.  Participants will then analyze their experimental data.

This short course is a highly compressed version of the SiEPIC CMC Passive Silicon Photonics Fabrication workshop – 3 hours versus 6 days of instruction; a one-month versus a one-year design-fabricate-test cycle; and a total minimum time commitment of only 5 hours! 

6. Silicon Photonics Design, Fabrication and Data AnalysisThis short course teaches students and industry professionals how to design integrated optical devices and circuits, using a hands-on approach with commercial tools. We will fabricate your designs using a state-of-the-art ($5M) silicon photonic rapid-prototyping 100 keV electron-beam lithography facility. We will measure your designs using an automated optical probe station and provide you the data. You will then analyze your experimental data.

 

For first-time designers, the focus project is a Mach-Zehndersilicon photonic thermo-optic switch. However, participants can design many other devices, e.g., directional couplers, ring resonators, disk resonators, Bragg gratings, photonic crystal, multi-mode interference (MMI) couplers, arrayed waveguide gratings (AWG), polarization diversity components, mode-division multiplexing (MDM), sub-wavelength grating (SWG) waveguides, slot waveguides, contra-directional couplers, etc. Example publications will be provided.


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